Symbolic analysis techniques : (Record no. 42056)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 05014nam a2201261 i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 5264205 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | IEEE |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20191218152116.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS | |
| fixed length control field | m o d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr |n||||||||| |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 151221s1998 nyu ob 001 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780470546512 |
| Qualifying information | electronic |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| Canceled/invalid ISBN | 9780780310759 |
| Qualifying information | |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| Canceled/invalid ISBN | 0470546514 |
| Qualifying information | electronic |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1109/9780470546512 |
| Source of number or code | doi |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (CaBNVSL)mat05264205 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (IDAMS)0b000064810c40d1 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | CaBNVSL |
| Language of cataloging | eng |
| Description conventions | rda |
| Transcribing agency | CaBNVSL |
| Modifying agency | CaBNVSL |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7874 |
| Item number | .S876 1998eb |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 22 |
| 245 00 - TITLE STATEMENT | |
| Title | Symbolic analysis techniques : |
| Remainder of title | applications to analog design automation / |
| Statement of responsibility, etc. | edited by Francisco V. Fern�andez ... [et al.]. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | New York : |
| Name of producer, publisher, distributor, manufacturer | IEEE Press, |
| Date of production, publication, distribution, manufacture, or copyright notice | c1998. |
| 264 #2 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | [Piscataqay, New Jersey] : |
| Name of producer, publisher, distributor, manufacturer | IEEE Xplore, |
| Date of production, publication, distribution, manufacture, or copyright notice | [1998] |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 PDF (xix, 390 pages). |
| 336 ## - CONTENT TYPE | |
| Content type term | text |
| Source | rdacontent |
| 337 ## - MEDIA TYPE | |
| Media type term | electronic |
| Source | isbdmedia |
| 338 ## - CARRIER TYPE | |
| Carrier type term | online resource |
| Source | rdacarrier |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc. note | Includes bibliographical references and index. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Preface. Acknowledgments. Introduction. Symbolic Analysis Techniques: A Review. Symbolic Analysis of Sampled-Data Systems. Symbolic Analysis of Switched Analog Circuits. Hierarchical Symbolic Analysis of Large Analog Circuits. Symbolic Formula Approximation. Symbolic Analysis of Weakly Nonlinear Analog Integrated Circuits. Structural Synthesis and Optimization of Analog Circuits. Automated Analog Design Using Compiled Symbolic Models. Symbolic Signal Flow Graph Methods in Switched-Capacitor Design. Symbolic Methods in Semiconductor Parameter Extraction. Statistical Delay Characterization of CMOS Digital Combinational Circuits. Analog Testability and Fault Diagnosis Using Symbolic Analysis. Index. About the Editors. |
| 506 1# - RESTRICTIONS ON ACCESS NOTE | |
| Terms governing access | Restricted to subscribers or individual electronic text purchasers. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | This timely, self-contained volume gathers information disseminated from journals, workshops, and conference proceedings to present the most recent and most important applications of symbolic analysis to analog circuit design. It features an in-depth tutorial introduction to the techniques and algorithms underlying modern symbolic analyzers, and includes exhaustive references at the end of each section. |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE | |
| Additional physical form available note | Also available in print. |
| 538 ## - SYSTEM DETAILS NOTE | |
| System details note | Mode of access: World Wide Web |
| 588 ## - SOURCE OF DESCRIPTION NOTE | |
| Source of description note | Description based on PDF viewed 12/21/2015. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Linear integrated circuits |
| General subdivision | Design and construction |
| -- | Data processing. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Symbolic circuit analysis. |
| 655 #0 - INDEX TERM--GENRE/FORM | |
| Genre/form data or focus term | Electronic books. |
| 695 ## - | |
| -- | Admittance |
| 695 ## - | |
| -- | Algorithm design and analysis |
| 695 ## - | |
| -- | Analog circuits |
| 695 ## - | |
| -- | Analog integrated circuits |
| 695 ## - | |
| -- | Analytical models |
| 695 ## - | |
| -- | Approximation methods |
| 695 ## - | |
| -- | Binary trees |
| 695 ## - | |
| -- | Biographies |
| 695 ## - | |
| -- | Biological system modeling |
| 695 ## - | |
| -- | Bismuth |
| 695 ## - | |
| -- | Capacitance |
| 695 ## - | |
| -- | Capacitors |
| 695 ## - | |
| -- | Circuit faults |
| 695 ## - | |
| -- | Circuit synthesis |
| 695 ## - | |
| -- | Classification algorithms |
| 695 ## - | |
| -- | Clocks |
| 695 ## - | |
| -- | Closed-form solution |
| 695 ## - | |
| -- | Complexity theory |
| 695 ## - | |
| -- | Consumer electronics |
| 695 ## - | |
| -- | Cost function |
| 695 ## - | |
| -- | Data mining |
| 695 ## - | |
| -- | Data models |
| 695 ## - | |
| -- | Delay |
| 695 ## - | |
| -- | Design automation |
| 695 ## - | |
| -- | Equations |
| 695 ## - | |
| -- | Fault diagnosis |
| 695 ## - | |
| -- | Feedback amplifier |
| 695 ## - | |
| -- | Finite element methods |
| 695 ## - | |
| -- | Frequency domain analysis |
| 695 ## - | |
| -- | Harmonic analysis |
| 695 ## - | |
| -- | Indexes |
| 695 ## - | |
| -- | Integrated circuit modeling |
| 695 ## - | |
| -- | Kernel |
| 695 ## - | |
| -- | Knowledge based systems |
| 695 ## - | |
| -- | Layout |
| 695 ## - | |
| -- | MOSFETs |
| 695 ## - | |
| -- | Mathematical model |
| 695 ## - | |
| -- | Matrices |
| 695 ## - | |
| -- | Memory management |
| 695 ## - | |
| -- | Minimization |
| 695 ## - | |
| -- | Mixers |
| 695 ## - | |
| -- | Numerical analysis |
| 695 ## - | |
| -- | Numerical models |
| 695 ## - | |
| -- | Optimization |
| 695 ## - | |
| -- | Parameter extraction |
| 695 ## - | |
| -- | Partitioning algorithms |
| 695 ## - | |
| -- | Polynomials |
| 695 ## - | |
| -- | RLC circuits |
| 695 ## - | |
| -- | Resonant frequency |
| 695 ## - | |
| -- | Search problems |
| 695 ## - | |
| -- | Sections |
| 695 ## - | |
| -- | Semiconductor device measurement |
| 695 ## - | |
| -- | Semiconductor device modeling |
| 695 ## - | |
| -- | Software |
| 695 ## - | |
| -- | Solid modeling |
| 695 ## - | |
| -- | Sparse matrices |
| 695 ## - | |
| -- | Steady-state |
| 695 ## - | |
| -- | Switches |
| 695 ## - | |
| -- | Switching circuits |
| 695 ## - | |
| -- | Synchronization |
| 695 ## - | |
| -- | Systematics |
| 695 ## - | |
| -- | Testing |
| 695 ## - | |
| -- | Topology |
| 695 ## - | |
| -- | Transfer functions |
| 695 ## - | |
| -- | Transistors |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Fern�andez, Francisco V., |
| Dates associated with a name | 1965- |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | John Wiley & Sons, |
| Relator term | publisher. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | IEEE Xplore (Online service), |
| Relator term | distributor. |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Relationship information | Print version: |
| International Standard Book Number | 9780780310759 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS | |
| Materials specified | Abstract with links to resource |
| Uniform Resource Identifier | https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5264205 |
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