000			04125nam a2200973 i 4500
001			7493778
003			IEEE
005			20191218152127.0
006			m o d
007			cr |n|||||||||
008			160704s2016 nju ob 001 eng d
010			_z 2015008307 (print)
020			_a9781118861899 _qelectronic
020			_z9781118861905 _qhardback
024	7		_a10.1002/9781118861899 _2doi
035			_a(CaBNVSL)mat07493778
035			_a(IDAMS)0b000064851d89b3
040			_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL
050		4	_aTK7867.8 _b.D88 2015eb
082	0	0	_a537/.2 _223
100	1		_aDuvvury, Charvaka, _d1944-
245	1	0	_aSystem level ESD co-design / _cCharvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany.
264		1	_aHoboken : _bJohn Wiley and Sons, Inc., _c2015.
264		2	_a[Piscataqay, New Jersey] : _bIEEE Xplore, _c[2016]
300			_a1 PDF (424 pages).
336			_atext _2rdacontent
337			_aelectronic _2isbdmedia
338			_aonline resource _2rdacarrier
490	1		_aWiley - IEEE
504			_aIncludes bibliographical references and index.
505	8		_aMachine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C -- Dunnihoo Index .
506	1		_aRestricted to subscribers or individual electronic text purchasers.
520			_a"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"-- _cProvided by publisher.
530			_aAlso available in print.
538			_aMode of access: World Wide Web
588			_aDescription based on PDF viewed 07/04/2016.
650		0	_aShielding (Electricity)
650		0	_aElectronic apparatus and appliances _xDesign and construction.
650		0	_aIntegrated circuits _xDesign and construction.
650		0	_aIntegrated circuits _xProtection.
650		0	_aElectrostatics.
650		0	_aStatic eliminators.
655		0	_aElectronic books.
695			_aAutomotive applications
695			_aCapacitance
695			_aCouplings
695			_aDischarges (electric)
695			_aElectrostatic discharges
695			_aFailure analysis
695			_aGrounding
695			_aIEC
695			_aIEC Standards
695			_aImpedance
695			_aIndustries
695			_aIntegrated circuit modeling
695			_aIntegrated circuits
695			_aJunctions
695			_aLaw
695			_aLimiting
695			_aLogic gates
695			_aManufacturing
695			_aMetals
695			_aMobile communication
695			_aMobile handsets
695			_aPerformance evaluation
695			_aPins
695			_aProbabilistic logic
695			_aProduction
695			_aProduction facilities
695			_aQualifications
695			_aRobustness
695			_aSoftware
695			_aStandards
695			_aStress
695			_aTesting
695			_aTransient analysis
695			_aVoltage control
695			_aVoltage measurement
700	1		_aGossner, Harald.
710	2		_aIEEE Xplore (Online Service), _edistributor.
710	2		_aWiley, _epublisher.
830		0	_aWiley - IEEE
856	4	2	_3Abstract with links to resource _uhttps://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=7493778
999			_c42622 _d42622