Routing in the third dimension : (Record no. 42042)
[ view plain ]
| 000 -LEADER | |
|---|---|
| fixed length control field | 03882nam a2200937 i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 5263943 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | IEEE |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20191218152115.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS | |
| fixed length control field | m o d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr |n||||||||| |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 151221s1995 njua ob 001 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780470546376 |
| Qualifying information | electronic |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| Canceled/invalid ISBN | 9780780310896 |
| Qualifying information | |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| Canceled/invalid ISBN | 0470546379 |
| Qualifying information | electronic |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1109/9780470546376 |
| Source of number or code | doi |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (CaBNVSL)mat05263943 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (IDAMS)0b000064810c3d77 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | CaBNVSL |
| Language of cataloging | eng |
| Description conventions | rda |
| Transcribing agency | CaBNVSL |
| Modifying agency | CaBNVSL |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7874.75 |
| Item number | .S48 1995eb |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.39/5 |
| Edition number | 22 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Sherwani, N. A., |
| Fuller form of name | (Naveed A.) |
| Relator term | author. |
| 245 10 - TITLE STATEMENT | |
| Title | Routing in the third dimension : |
| Remainder of title | from VLSI chips to MCMs / |
| Statement of responsibility, etc. | Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | Piscataway, New Jersey : |
| Name of producer, publisher, distributor, manufacturer | IEEE Press, |
| Date of production, publication, distribution, manufacture, or copyright notice | c1995. |
| 264 #2 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | [Piscataqay, New Jersey] : |
| Name of producer, publisher, distributor, manufacturer | IEEE Xplore, |
| Date of production, publication, distribution, manufacture, or copyright notice | [1995] |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 PDF (xviii, 358 pages) : |
| Other physical details | illustrations. |
| 336 ## - CONTENT TYPE | |
| Content type term | text |
| Source | rdacontent |
| 337 ## - MEDIA TYPE | |
| Media type term | electronic |
| Source | isbdmedia |
| 338 ## - CARRIER TYPE | |
| Carrier type term | online resource |
| Source | rdacarrier |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc. note | Includes bibliographical references (p. 335-350) and indexes. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Preface. Acknowledgments. Introduction. Graphs and Basic Algorithms. Channel Routing and Terminal Assignment. Routing Models. Basic Problems in Routing. Routing Algorithms for the Two-Layer Process. Routing Algorithms for the Three-Layer Process. Routing Algorithms for the Advanced Three-Layered Process. Routing Algorithms for Advanced VLSI and Thin-Film MCMs. Routing Algorithms for General MCMs. Bibliography. Author Index. Subject Index. |
| 506 1# - RESTRICTIONS ON ACCESS NOTE | |
| Terms governing access | Restricted to subscribers or individual electronic text purchasers. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | This key text addresses the complex computer chips of tomorrow which will consist of several layers of metal interconnect, making the interconnect within a chip or a multichip module a three dimensional problem. You'll find an insightful approach to the algorithmic, cell design issues in chip and MCM routing with an emphasis on techniques for eliminating routing area. |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE | |
| Additional physical form available note | Also available in print. |
| 538 ## - SYSTEM DETAILS NOTE | |
| System details note | Mode of access: World Wide Web |
| 588 ## - SOURCE OF DESCRIPTION NOTE | |
| Source of description note | Description based on PDF viewed 12/21/2015. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Integrated circuits |
| General subdivision | Very large scale integration |
| -- | Computer-aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Multichip modules (Microelectronics) |
| General subdivision | Computer-aided design. |
| 655 #0 - INDEX TERM--GENRE/FORM | |
| Genre/form data or focus term | Electronic books. |
| 695 ## - | |
| -- | Algorithm design and analysis |
| 695 ## - | |
| -- | Approximation algorithms |
| 695 ## - | |
| -- | Approximation methods |
| 695 ## - | |
| -- | Bibliographies |
| 695 ## - | |
| -- | Bipartite graph |
| 695 ## - | |
| -- | CMOS integrated circuits |
| 695 ## - | |
| -- | Classification algorithms |
| 695 ## - | |
| -- | Color |
| 695 ## - | |
| -- | Compaction |
| 695 ## - | |
| -- | Complexity theory |
| 695 ## - | |
| -- | Computer architecture |
| 695 ## - | |
| -- | Delay |
| 695 ## - | |
| -- | Estimation |
| 695 ## - | |
| -- | Fabrication |
| 695 ## - | |
| -- | Heuristic algorithms |
| 695 ## - | |
| -- | Indexes |
| 695 ## - | |
| -- | Integrated circuit interconnections |
| 695 ## - | |
| -- | Integrated circuit modeling |
| 695 ## - | |
| -- | Layout |
| 695 ## - | |
| -- | Libraries |
| 695 ## - | |
| -- | Logic gates |
| 695 ## - | |
| -- | Mathematical model |
| 695 ## - | |
| -- | Metals |
| 695 ## - | |
| -- | Microprocessors |
| 695 ## - | |
| -- | Minimization |
| 695 ## - | |
| -- | Nickel |
| 695 ## - | |
| -- | Pins |
| 695 ## - | |
| -- | Polynomials |
| 695 ## - | |
| -- | Regions |
| 695 ## - | |
| -- | Routing |
| 695 ## - | |
| -- | Shape |
| 695 ## - | |
| -- | Substrates |
| 695 ## - | |
| -- | Terminology |
| 695 ## - | |
| -- | Transistors |
| 695 ## - | |
| -- | Very large scale integration |
| 695 ## - | |
| -- | Wire |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Bhingarde, Siddharth. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Panyam, Anand. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | John Wiley & Sons, |
| Relator term | publisher. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | IEEE Xplore (Online service), |
| Relator term | distributor. |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Relationship information | Print version: |
| International Standard Book Number | 9780780310896 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS | |
| Materials specified | Abstract with links to resource |
| Uniform Resource Identifier | https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5263943 |
No items available.